High-speed signal processing systems' technological and scientific foundation
Date of approval: 2019 June 17
Core Secretary: Dr. Hossein Haqbin
Core activity axes
- modeling, simulation, and analysis of systems based on reprogrammable CPUs
- FPGA implementation of commonly used algorithms from a variety of industries and the potential for updating them with a focus on fault resistance
- Creating and modeling systems for online monitoring, damage prediction, and lifespan estimation
- Use of FPGAs for signal and image processing as well as channel coding techniques
Programs:
- Analyzing, modeling, and simulating systems using reconfigurable processors
- The FPGA implementation of widely used algorithms in a variety of industries, as well as the possibility of updating them with a flaw-resistant approach.
- Using IoT-based IR and visible image processing to examine the security of various surroundings
- Modeling and constructing systems that can monitor data online, forecast damage, and estimate lifetime
- Signal and image processing, as well as channel coding methods, on FPGAs